DocumentCode :
67059
Title :
Suitability of the FinFET 3T1D Cell Beyond 10 nm
Author :
Amat, Esteve ; Almudever, C.G. ; Aymerich, N. ; Canal, Ramon ; Rubio, Albert
Author_Institution :
Electron. Dept., Univ. Politec. de Catalunya, Barcelona, Spain
Volume :
13
Issue :
5
fYear :
2014
fDate :
Sept. 2014
Firstpage :
926
Lastpage :
932
Abstract :
The performance of the 3T1D-DRAM cell beyond 10-nm technology node is investigated when the memory cell is based on nonplanar multigate devices, i.e., FinFETs. Moreover, for completeness, the cell is analyzed in both SOI and bulk-based FinFETs. While relevant process variation robustness is observed in SOI-based FinFETs, 10× lower impact than for bulk-based ones. In order to improve the variability robustness of bulk-based FinFET cell, we propose a dual-VT strategy to enhance the dynamic cell behavior.
Keywords :
DRAM chips; MOSFET; silicon-on-insulator; FinFET 3T1D cell; SOI; dual-VT strategy; dynamic cell behavior; memory cell; nonplanar multigate devices; size 10 nm; Capacitance; FinFETs; Leakage currents; Logic gates; Performance evaluation; Robustness; DRAM; FinFET; variability and temperature;
fLanguage :
English
Journal_Title :
Nanotechnology, IEEE Transactions on
Publisher :
ieee
ISSN :
1536-125X
Type :
jour
DOI :
10.1109/TNANO.2014.2332180
Filename :
6842599
Link To Document :
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