Tunnel FETs with tunneling normal to the gate

Author

Xing, Huili Grace ; Guangle Zhou ; Mingda Li ; Yiqing Lu ; Rui Li ; Wistey, M. ; Fay, Patrick ; Jena, D. ; Seabaugh, Alan

Author_Institution

Electr. Eng. Dept., Univ. of Notre Dame, Notre Dame, IN, USA

fYear

2013

fDate

28-29 Oct. 2013

Firstpage

1

Lastpage

1

Abstract

Summary form only given. In this talk, I will review some of the recent development of tunnel field effect transistors (TFETs) at Notre Dame [1-8]. Tunnel FETs are promising replacements of Si-MOSFETs beyond 2020 due to their promise to achieve I_on/I_off > 10³ with I_on > 100 uA/um at low supply voltages (up to 0.5 V). To date we have demonstrated I_on/I_off ~ 10⁶, I_on ~ 180 uA/um, separately, based on III-V heterostructures. Challenges ahead include electrostatic control, defect-assisted tunneling and interface state density and parasitics. More recently, we have started to investigate 2D crystal based TFETs for their promises to realize ultrascaled electronic switches.

Keywords

electrostatics; field effect transistors; interface states; low-power electronics; tunnel transistors; 2D crystal based TFETs; III-V heterostructures; defect-assisted tunneling; electrostatic control; interface state density; tunnel FETs; tunnel field effect transistors; ultrascaled electronic switches; Field effect transistors; Indium gallium arsenide; Indium phosphide; Logic gates; Nanoelectronics; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Energy Efficient Electronic Systems (E3S), 2013 Third Berkeley Symposium on

Conference_Location

Berkeley, CA

Type

conf

DOI

10.1109/E3S.2013.6705871

Filename

6705871