Cu pillar bump-on-trace (BoT) design for ultra low-k packaging

In this work, the design of a flip chip chip scale package (FCCSP) using 28 nm ultra low-k (ULK) die and copper (Cu) pillar BOT technology were presented and qualified by reliability test. Many tests and inspections were implemented to check the fabrication process quality such as bump shear test, die chipping/crack inspection after die saw, X-ray inspection after die bond reflow, and scanning acoustic microscopy (SAT) inspection after underfill dispersing and molding. In addition, the three-dimensional finite element analysis (FEA) was employed to compare the impact of molding compounds on the packaging stress before true experiment. All samples passed the open/short test and no underfill or ULK delamination was found by SAT and scanning electron microscopy (SEM) cross-section check after MSL-3 pre-condition, Thermal Cycling test (TCT), High Temperature Storage test (HTST) and Unbiased Highly Accelerated Stress Test (uHAST).