DocumentCode
671953
Title
Implementation of medical image processing algorithm on reconfigurable hardware
Author
Chiuchisan, Iulian
Author_Institution
Electr. Eng. & Comput. Sci., “Stefan cel Mare” Univ. of Suceava, Suceava, Romania
fYear
2013
fDate
21-23 Nov. 2013
Firstpage
1
Lastpage
4
Abstract
In order to implement the upcoming digital image processing algorithms and to process the amount of data captured from sources such as medical instruments, intelligent high speed real-time systems have become imperative. In this paper an efficient FPGA-based design and implementation of image processing algorithm are presented using hardware description language. The FPGA provides the necessary hardware for image processing algorithms with flexibility to support medical image processing by using point operations. The proposed pseudo-color algorithm is designed using Verilog HDL, simulated, tested and synthesized with Xilinx ISE Design Suite 14.5.
Keywords
field programmable gate arrays; hardware description languages; image colour analysis; logic CAD; medical image processing; reconfigurable architectures; FPGA-based design; Verilog HDL; Xilinx ISE Design Suite 14.5; data processing; digital image processing algorithm; hardware description language; intelligent high speed real-time systems; medical image processing algorithm; medical instruments; point operations; pseudocolor algorithm; reconfigurable hardware; Algorithm design and analysis; Biomedical imaging; Field programmable gate arrays; Hardware; Hardware design languages; Image color analysis; FPGA; Verilog; digital image processing; image enhancement; pseudo-color algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
E-Health and Bioengineering Conference (EHB), 2013
Conference_Location
Iasi
Print_ISBN
978-1-4799-2372-4
Type
conf
DOI
10.1109/EHB.2013.6707298
Filename
6707298
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