Title :
SAT-based approaches to verification of logical descriptions with functional indeterminacy
Author :
Cheremisinova, Liudmila D.
Author_Institution :
United Inst. of Inf. Problems of NAS of Belarus Minsk, Minsk, Belarus
Abstract :
The problem under discussion is to check whether a given system of incompletely specified Boolean functions is implemented by a logical description that is represented by a system of connected blocks each of which is specified by a system of completely or incompletely specified Boolean functions. SAT-based verification approaches are considered which formulate the verification problem as checking satisfiability of a conjunctive normal form. The results of investigation of SAT-based verification methods are given.
Keywords :
Boolean functions; computability; formal verification; logic CAD; SAT-based verification approach; conjunctive normal form satisfiability checking; functional indeterminacy; incompletely specified Boolean functions; logical description verification; Boolean functions; Encoding; Formal verification; Integrated circuit modeling; Logic gates; Solid modeling; Vectors; Computer-aided design; formal verification; satisfiabilty of a conjunctive normal;
Conference_Titel :
Computer Science and Information Technologies (CSIT), 2013
Conference_Location :
Yerevan
Print_ISBN :
978-1-4799-2460-8
DOI :
10.1109/CSITechnol.2013.6710327
