DocumentCode
674448
Title
Analysis of semiconductor power losses in M-level NPC inverters
Author
Alemi, Payam ; Dong-Choon Lee
Author_Institution
Dept. of Electr. Eng., Yeungnam Univ., Gyeongsan, South Korea
fYear
2013
fDate
26-29 Oct. 2013
Firstpage
1513
Lastpage
1519
Abstract
In this paper, a power loss evaluation algorithm for M-level neutral-point clamped (NPC) PWM inverters is presented. In a three-level inverter, the conduction loss depends on the MI (modulation index) and the PF (power factor), and the switching loss depends on a switching frequency, turn-on and turn-off energy. However, in the higher level of inverters than the three-level, the modulation depth should be considered in addition since the conducting devices are different depending on the MI. In a case study, the power loss analysis for the three- and five-level NPC inverters has been performed with the proposed algorithm.
Keywords
PWM invertors; power factor; M-level NPC inverters; M-level neutral-point clamped PWM inverters; conduction loss; five-level NPC inverters; modulation depth; modulation index; power factor; power loss evaluation algorithm; semiconductor power losses analysis; switching frequency; switching loss; three-level NPC inverters; three-level inverter; turn-off energy; turn-on energy; Integrated circuits; Inverters; Pulse width modulation; Switches; Switching frequency; Switching loss; M-level NPC inverter; conduction loss; power loss analysis; switching loss;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Machines and Systems (ICEMS), 2013 International Conference on
Conference_Location
Busan
Print_ISBN
978-1-4799-1446-3
Type
conf
DOI
10.1109/ICEMS.2013.6713339
Filename
6713339
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