• DocumentCode
    674987
  • Title

    Neutralizing a design-for-hardware-trust technique

  • Author

    Shekarian, Seyed Mohammad Hossein ; Zamani, Morteza Saheb ; Alami, Shirin

  • Author_Institution
    Comput. & Inf. Technol. Dept., Amirkabir Univ. of Technol., Tehran, Iran
  • fYear
    2013
  • fDate
    30-31 Oct. 2013
  • Firstpage
    73
  • Lastpage
    78
  • Abstract
    Hardware Trojan horses (HTHs) are important threats to the trustworthiness of hardware chips. Design-for-hardware-trust (DFHT) techniques are used to enhance the detectability of possible HTHs. Existing DFHT approaches are usually ad-hoc techniques. This characteristic makes them vulnerable to neutralization efforts. We study this concept by focusing on an effective available DFHT technique, namely dummy scan flip-flop (DSFF) insertion. We provide a method for neutralizing the DSFF technique. Our experiments show that DSFF can be easily neutralized without recognizable side effects. This demonstrates the importance of improving the existing ad-hoc DFHT techniques.
  • Keywords
    flip-flops; invasive software; logic design; trusted computing; DSFF insertion; HTH detectability; ad-hoc DFHT techniques; design-for-hardware-trust technique neutralization; dummy scan flip-flop insertion; hardware Trojan horses; hardware chips trustworthiness threats; Benchmark testing; Clocks; Hardware; Logic gates; Noise; Probabilistic logic; Trojan horses; DFHT neutralization; design-forhardware-trust (DFHT) techniques; hardware Trojan horses (HTH); side-channel analysis component; transition probability (TP);
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Architecture and Digital Systems (CADS), 2013 17th CSI International Symposium on
  • Conference_Location
    Tehran
  • Print_ISBN
    978-1-4799-0562-1
  • Type

    conf

  • DOI
    10.1109/CADS.2013.6714240
  • Filename
    6714240