Direct point-contact characterization of Bias instability on bare SOI wafers

Bias Instability is a reliability issue affecting the threshold voltage of a MOS transistor when the gate is stressed with relatively high voltage. For the first time, we characterize the instability of bare SOI wafers using a Pseudo-MOSFET configuration. The effect of positive and negative stress pulses on the properties of both hole and electron channels is systematically investigated. The origins of the instability, the dependence of the degradation with time, and the recovery after the stress have been discussed.dependence