Fibonacci-Based Hardware Post-Processing for Non-Autonomous Signum Hyperchaotic System

Author

Mansingka, Abhinav S. ; Barakat, Mohamed L. ; Zidan, Mohammed Affan ; Radwan, A.G. ; Salama, Khaled N.

Author_Institution

Electr. Eng. Program, King Abdullah Univ. of Sci. & Technol., Thuwal, Saudi Arabia

fYear

2013

fDate

16-18 Dec. 2013

Firstpage

1

Lastpage

4

Abstract

This paper presents a hardware implementation of a robust non-autonomous hyperchaotic-based PRNG driven by a 256-bit LFSR. The original chaotic output is post-processed using a novel technique based on the Fibonacci series, bitwise XOR, rotation, and feedback. The proposed post-processing technique preserves the throughput of the system and enhances the randomness in the output which is verified by successfully passing all NIST SP. 800-22 tests. The system is realized on a Xilinx Virtex 4 FPGA achieving throughput up to 13.165 Gbits/s for 16-bit bus-width surpassing previously reported CB-PRNGs.

Keywords

Fibonacci sequences; chaos; field programmable gate arrays; logic design; random processes; Fibonacci based hardware post processing; Fibonacci series; Xilinx Virtex 4 FPGA; bitwise XOR operation; chaotic output; nonautonomous signum hyperchaotic system; Chaotic communication; Field programmable gate arrays; Generators; Hardware; NIST; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

IT Convergence and Security (ICITCS), 2013 International Conference on

Conference_Location

Macao

Type

conf

DOI

10.1109/ICITCS.2013.6717834

Filename

6717834