Title :
Automated multi-device placement, I/O voltage supply assignment, and pin assignment in circuit board design
Author :
Seemuth, Daniel P. ; Morrow, Katherine
Author_Institution :
Electr. & Comput. Eng, Univ. of Wisconsin - Madison, Madison, WI, USA
Abstract :
Embedded systems often contain many components, some with multiple Field Programmable Gate Arrays (FPGAs). Designing Printed Circuit Boards (PCBs) for these systems can be a complex process that is often tedious, error-prone, and time-intensive. Existing computer-aided design tools require designers to manually insert components and explicitly define the connections between every component on the PCB - a cumbersome process. A fast PCB design framework requiring reduced designer time and effort would be particularly advantageous for rapid prototyping and short production run PCBs. Therefore, this paper proposes a novel, freely-available open-source framework to capture design intent and automatically implement the design details. Designers express connectivity at a higher level of abstraction than enumerating or drawing each individual trace between components. Given the components and connection requirements, the proposed framework automatically generates component placements, I/O voltage supply assignments, and FPGA pin assignments to minimize trace length. We also propose a novel method to improve trace length estimations during placement, before FPGA pins have actually been assigned to those connections. The proposed framework quickly explores large solution spaces, enabling rapid prototyping and design space exploration, and can lead to lower costs in design time and other non-recurring expenses. We demonstrate that it produces favorable results for various design requirements, which suggests the framework will be especially appreciated by designers of systems with multiple FPGAs having large numbers of flexible pins.
Keywords :
circuit CAD; field programmable gate arrays; printed circuit design; FPGA pin assignments; I/O voltage supply assignment; automated multidevice placement; computer-aided design tools; design space exploration; embedded systems; fast PCB design framework; freely-available open-source framework; multiple field programmable gate arrays; printed circuit board design; rapid prototyping; short production run PCBs; trace length estimations; trace length minimization; Design automation; Field programmable gate arrays; Joining processes; Layout; Pins; Simulated annealing; Wires; computer-aided design; design capture; electronic design automation; field-programmable gate array; high-level specification; pin assignment; printed circuit board; rapid prototyping;
Conference_Titel :
Field-Programmable Technology (FPT), 2013 International Conference on
Conference_Location :
Kyoto
Print_ISBN :
978-1-4799-2199-7
DOI :
10.1109/FPT.2013.6718363