DocumentCode
676357
Title
Real-time high-quality stereo vision system in FPGA
Author
Wenqiang Wang ; Jing Yan ; Ningyi Xu ; Yu Wang ; Feng-hsiung Hsu
Author_Institution
Microsoft Res. Asia, Beijing, China
fYear
2013
fDate
9-11 Dec. 2013
Firstpage
358
Lastpage
361
Abstract
Stereo vision is a well-known technique for acquiring depth information. In this paper, we present an FPGA-based real-time high-quality stereo vision system. By using AD-Census cost initialization, cross-based aggregation and semi-global optimization, the system provides high-quality depth results for highdefinition images. This is the first complete real-time hardware system that supports both cost aggregation on cross-based regions and semi-global optimization on FPGA. The system can adjust image resolution, parallelism degree, and support region size to achieve maximum efficiency flexibly during the implementation. We test the accuracy of the system on the Middlebury benchmark and some real-world scenarios with different image resolutions. The results show the accuracy is among the best of FPGA-based stereo vision systems and competitive with current top-performing software implementations. We demonstrate the system using an Altera Stratix-IV FPGA board, processing 1024 × 768 pixel images at 30 frames per second.
Keywords
field programmable gate arrays; image resolution; optimisation; stereo image processing; AD-census cost initialization; Altera Stratix-IV FPGA board; Middlebury benchmark; cross-based aggregation; high-definition image; image resolution; parallelism degree; real-time hardware system; real-time high-quality stereo vision system; semiglobal optimization; Accuracy; Field programmable gate arrays; Hardware; Image resolution; Optimization; Parallel processing; Stereo vision;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Technology (FPT), 2013 International Conference on
Conference_Location
Kyoto
Print_ISBN
978-1-4799-2199-7
Type
conf
DOI
10.1109/FPT.2013.6718387
Filename
6718387
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