DocumentCode :
676381
Title :
From C to Blokus Duo with LegUp high-level synthesis
Author :
Jiu Cheng Cai ; Ruolong Lian ; Mengyao Wang ; Canis, Andrew ; Jongsok Choi ; Fort, Blair ; Hart, Emma ; Miao, Emily ; Yanyan Zhang ; Calagar, Nazanin ; Brown, Shannon ; Anderson, Jon
Author_Institution :
Dept. of Electr. & Comput. Eng. & Dept. of Math., Univ. of Toronto, Toronto, ON, Canada
fYear :
2013
fDate :
9-11 Dec. 2013
Firstpage :
486
Lastpage :
489
Abstract :
We apply high-level synthesis (HLS) to generate Blokus Duo game-playing hardware for the FPT 2013 Design Competition [3]. Our design, written in C, is synthesized using the LegUp open-source HLS tool to Verilog, then subsequently mapped using vendor tools to an Altera Cyclone IV FPGA on DE2 board. Our software implementation is designed to be amenable to high-level synthesis, and includes a custom stack implementation, uses only integer arithmetic, and employs the use of bitwise logical operations to improve overall computational performance. The underlying AI decision making is based on alpha-beta pruning [2]. The performance of our synthesizable solution is gauged by playing against the Pentobi [8] - a “known good” C++ software implementation.
Keywords :
C++ language; field programmable gate arrays; high level synthesis; public domain software; software tools; AI decision making; Altera Cyclone IV FPGA; Blokus Duo game-playing hardware; C++ software implementation; DE2 board; FPT 2013 Design Competition; LegUp high-level synthesis; LegUp open-source HLS tool; Pentobi; Verilog; alpha-beta pruning; bitwise logical operations; integer arithmetic; Algorithm design and analysis; Arrays; Field programmable gate arrays; Games; Hardware; Software; Tiles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Technology (FPT), 2013 International Conference on
Conference_Location :
Kyoto
Print_ISBN :
978-1-4799-2199-7
Type :
conf
DOI :
10.1109/FPT.2013.6718424
Filename :
6718424
Link To Document :
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