Title :
Critical evaluation of SVPWM scheme for capacitor balancing in NPC-MLI
Author :
Bharatiraja, C. ; Jeevananthan, S. ; Palanisamy, Ramkumar ; Rao, K. V. R. S. Prakasa
Author_Institution :
SRM Univ., Chennai, India
Abstract :
This paper presents a generalized SVPWM technique to eliminate imbalances in the D.C-link capacitor voltage in 3Level Neutral point diode clamped( NPC) multilevel inverter(MLI), which is one of the main drawbacks of NPC multilevel inverter. Capacitor imbalance is due to the phase currents available in each switching state. By using the proper redundancy switching state the capacitor balance in linear-modultion can be achieved. The redundant state guarantees to achieve voltage balancing with no requirement of any additional control effort. The benefits of the proposed scheme has been verified through the Mat lab simulation and it´s validated in FPGASPARTEN III.
Keywords :
PWM invertors; capacitors; field programmable gate arrays; semiconductor diodes; D.C-link capacitor voltage; FPGA-SPARTEN III; Matlab simulation; NPC-MLI; capacitor balancing; control effort; generalized SVPWM technique; imbalance elimination; neutral point diode clamped multilevel inverter; phase currents; redundancy switching state; voltage balancing; D.C-link capacitor voltage balance; Field Programmable Gate Array (FPGA); Mat lab-Simulation; Netural Point balancing; Neutral-point Diode-clamped Multi Level inverter (NPC-MLI); Space Vector PWM (SVPWM);
Conference_Titel :
Sustainable Energy and Intelligent Systems (SEISCON 2012), IET Chennai 3rd International on
Conference_Location :
Tiruchengode
Electronic_ISBN :
978-1-84919-797-7
DOI :
10.1049/cp.2012.2226
