Title :
DFT implementation aspects and techniques suitable for VLSI implementation: A survey
Author :
Chauhan, Tanuj ; Karwal, V.
Author_Institution :
Dept. of Electron. & Commun. Eng., Jaypee Inst. of Inf. Technol., Noida, India
Abstract :
This paper explains design essentials for VLSI implementation of DFT algorithms. For applications such as Asynchronous Digital Subscriber Line (ADSL), Digital Video Broadcasting (DVB), and Orthogonal Frequency Division Multiplexing (OFDM) digital signal processing algorithms are a necessity. Hardware designed has to align area, power and performance trade-off´s. FFT (Fast Fourier Transform) is used for efficient evaluation of DFT (Discrete Fourier Transform). Paper surveys techniques such as pipelining, systolic architectures and CORDIC based architectures to achieve optimization in these FFT algorithms with respect to the applications.
Keywords :
OFDM modulation; VLSI; digital subscriber lines; digital video broadcasting; discrete Fourier transforms; signal processing; ADSL; CORDIC based architectures; DFT algorithms; DVB; Discrete Fourier Transform; FFT algorithms; Fast Fourier Transform; OFDM; VLSI implementation; asynchronous digital subscriber line; digital signal processing algorithms; digital video broadcasting; orthogonal frequency division multiplexing; pipelining architecture; systolic architectures; Algorithm design and analysis; Computer architecture; Digital signal processing; Hardware; OFDM; Signal processing algorithms; Very large scale integration; FFT; VLSI; parallel processing; pipelining; radix-2; radix-4; split-radix;
Conference_Titel :
Signal Processing and Communication (ICSC), 2013 International Conference on
Conference_Location :
Noida
Print_ISBN :
978-1-4799-1605-4
DOI :
10.1109/ICSPCom.2013.6719807