Title :
Simulation study for Dual Material Gate Hetero-Dielectric TFET: Static performance analysis for analog applications
Author :
Upasana ; Narang, Rakhi ; Gupta, Madhu ; Saxena, Manoj
Author_Institution :
Dept. of Electron. Sci., Univ. of Delhi, New Delhi, India
Abstract :
This paper presents simulation study of Static characteristics for DMG (Dual Material Gate) Hetero-Dielectric (H-D) Tunnel FET. Here, two previously reported device architectures i.e. a DMG Single Dielectric TFET and SMG (Single Material Gate) Hetero-Dielectric TFET have been optimized by tuning the work functions and length and later on their combined impact on the proposed device architecture i.e. DMG Hetero-Dielectric Tunnel FET (DMG H-D TFET) is been studied. Electrical parameters such as threshold voltage, drain current Ids, Sub threshold Slope, Ion to Ioff ratio, ambipolar current Iamb have been studied. Some of the important analog parameters like transconductance gm, drain conductance gd, Output resistance Rout, transconductance generation efficiency gm/Ids have also been studied using ATLAS Device Simulation Software.
Keywords :
dielectric devices; field effect transistors; tunnel transistors; work function; ATLAS Device Simulation Software; DMG heterodielectric tunnel FET; ambipolar current; analog applications; analog parameters; drain conductance; dual material gate; electrical parameters; single material gate; static characteristics; static performance analysis; transconductance generation; work functions; Dielectrics; Field effect transistors; High K dielectric materials; Logic gates; Performance evaluation; Threshold voltage; Double Gate; Dual Material Gate; Hetero-Dielectric; Tunnel FET;
Conference_Titel :
India Conference (INDICON), 2013 Annual IEEE
Conference_Location :
Mumbai
Print_ISBN :
978-1-4799-2274-1
DOI :
10.1109/INDCON.2013.6725867