Title :
An XOR-Based Approach to Merging Entries for Instruction Register Files
Author :
Fujieda, Naoki ; Ichikawa, Shuichi
Author_Institution :
Dept. of Electr. & Electron. Inf. Eng., Toyohashi Univ. of Technol., Toyohashi, Japan
Abstract :
The instruction register file (IRF) is an attractive approach to reduce power consumption, which is essential to many embedded systems. However, the previously proposed IRF implementation is not efficient in merging similar instructions into a single entry in the IRF. In this paper, we propose an XOR-based merging approach that achieves higher efficiency in grouping instructions with simple hardware. Our evaluation shows that the proposed approach can convert 19.6% more dynamic instructions into references of the IRF than the previous techniques, and that it reduces the number of instruction fetches from the cache by 4.8% on average.
Keywords :
cache storage; embedded systems; instruction sets; power aware computing; IRF; XOR-based merging approach; cache; embedded systems; entries merging; instruction fetches; instruction register files; power consumption reduction; Benchmark testing; Hardware; Indexes; Merging; Power demand; Program processors; Registers; Embedded Systems; Instruction Fetch; Instruction Register Files; Processor Architecture;
Conference_Titel :
Computing and Networking (CANDAR), 2013 First International Symposium on
Conference_Location :
Matsuyama
Print_ISBN :
978-1-4799-2795-1
DOI :
10.1109/CANDAR.2013.60