DocumentCode :
678772
Title :
Opportunistic redundancy for improving reliability of embedded processors
Author :
Zheng Wang ; Renlin Li ; Chattopadhyay, Abhiroop
Author_Institution :
MPSoC Archit., RWTH Aachen Univ., Aachen, Germany
fYear :
2013
fDate :
16-18 Dec. 2013
Firstpage :
1
Lastpage :
6
Abstract :
The downscaling of technology features has brought the system developers an important design criteria, reliability, into prime consideration. Among reliability concerns, transient fault caused by external radiation effects and temperature gradients is becoming a significant factor for the erroneous execution of embedded processors. State-of-the-art reliability-aware design techniques for embedded processors are yet to take complete advantage of the instruction set and application knowledge. In this work, we present reliability protection techniques for embedded processors which opportunistically take advantage of the hardware redundancy. Several policies based on the reliability requirements from the applications are introduced to explore the reliability-performance trade-off. The efficiency of proposed techniques are demonstrated by using several embedded processors.
Keywords :
integrated circuit design; integrated circuit reliability; radiation hardening (electronics); system-on-chip; application knowledge; design criteria; embedded processors; external radiation effects; hardware redundancy; instruction set; opportunistic redundancy; reliability improvement; reliability protection technique; reliability-aware design technique; reliability-performance trade-off; system-on-chips; temperature gradients; transient fault; Computer architecture; Pipelines; Reduced instruction set computing; Redundancy; VLIW; Hardware Redundancy; Opportunistic Protection; Reliability Exploration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Test Symposium (IDT), 2013 8th International
Conference_Location :
Marrakesh
Type :
conf
DOI :
10.1109/IDT.2013.6727090
Filename :
6727090
Link To Document :
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