• DocumentCode
    679626
  • Title

    Measuring and Analyzing Write Amplification Characteristics of Solid State Disks

  • Author

    Hui Sun ; Xiao Qin ; Fei Wu ; Changsheng Xie

  • Author_Institution
    Sch. of Comput. Sci. & Technol., Huazhong Univ. of Sci. & Technol., Wuhan, China
  • fYear
    2013
  • fDate
    14-16 Aug. 2013
  • Firstpage
    212
  • Lastpage
    221
  • Abstract
    Write amplification brings endurance challenges to NAND Flash-based solid state disks (SSDs) such as impacts upon their write endurance and lifetime. A large write amplification degrades program/erase cycles (P/Es) of NAND Flashes and reduces the endurance and performance of SSDs. The write amplification problem is mainly triggered by garbage collections, wear-leveling, metadata updates, and mapping table updates. Write amplification is defined as the ratio of data volume written by an SSD controller to data volume written by a host. In this paper, we propose a four-level model of write amplification for SSDs. The four levels considered in our model include the channel level, chip level, die level, and plane level. In light of this model, we design a method of analyzing write amplification of SSDs to trace SSD endurance and performance by incorporating the Ready/Busy (R/B) signal of NAND Flash. Our practical approach aims to measure the value of write amplification for an entire SSD rather than NAND Flashes. To validate our measurement technique and model, we implement a verified SSD (vSSD) system and perform a cross-comparison on a set of SSDs, which are stressed by micro-benchmarks and I/O traces. A new method for SSDs is adopted in our measurements to study the R/B signals of NAND Flashes in an SSD. Experimental results show that our model is accurate and the measurement technique is generally applicable to any SSDs.
  • Keywords
    NAND circuits; disc storage; flash memories; NAND flash-based solid state disks; SSD; channel level; chip level; die level; garbage collections; mapping table updates; metadata updates; plane level; program-erase cycles; ready-busy signal; verified SSD; wear-leveling; write amplification characteristics; Analytical models; Flash memories; Parallel processing; Random access memory; Semiconductor device measurement; Solid modeling; Solids; Read/Busy signal; Solid State Disk; Write amplification;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Modeling, Analysis & Simulation of Computer and Telecommunication Systems (MASCOTS), 2013 IEEE 21st International Symposium on
  • Conference_Location
    San Francisco, CA
  • ISSN
    1526-7539
  • Type

    conf

  • DOI
    10.1109/MASCOTS.2013.29
  • Filename
    6730764