DocumentCode :
680028
Title :
A software-based technique enabling composable hierarchical preemptive scheduling for time-triggered applications
Author :
Nejad, Ashkan Beyranvand ; Molnos, Anca ; Goossens, Kees
Author_Institution :
Delft Univ. of Technol., Delft, Netherlands
fYear :
2013
fDate :
19-21 Aug. 2013
Firstpage :
183
Lastpage :
192
Abstract :
Many embedded real-time applications are typically time-triggered and preemptive schedulers are used to execute tasks of such applications. Orthogonally, composable partitioned embedded platforms use preemptive time-division multiplexing mechanism to isolate applications. Existing composable systems that support two-level scheduling are restricted to cooperative intra-application schedulers, and thus cannot execute the time-triggered applications. In this work, we introduce a framework that allows concurrent, composable execution of such applications on temporally-partitioned systems. The framework is composed of an execution platform and a method for timing analysis of applications running on the platform. The platform realizes a software-based timed-interrupt virtualization technique on an existing composable system. Multiple time-triggered applications may run concurrently using different intra-application preemptive scheduling policies, e.g., fixed-priority and rate-monotonic. The analysis method formalizes the available processing time for executing each application on a processor in order to enable schedulability tests for different policies. Finally, these concepts are demonstrated by executing a number of applications, first on an FPGA prototype and second on a Matlab simulation of the platform. The results indicate a composable and concurrent execution of multiple time-triggered applications using our proposed framework. Furthermore, the implementation of the technique has low cost in terms of memory footprint and execution overhead.
Keywords :
embedded systems; processor scheduling; program verification; software engineering; system-on-chip; virtualisation; FPGA prototype; Matlab simulation; composable hierarchical preemptive scheduling; cooperative intra-application schedulers; embedded real-time applications; execution overhead; fixed-priority; intra-application preemptive scheduling policy; memory footprint; multiple time-triggered applications; orthogonally composable partitioned embedded platforms; preemptive time-division multiplexing mechanism; rate-monotonic; schedulability tests; software-based timed-interrupt virtualization technique; temporally-partitioned systems; timing analysis; two-level scheduling; Computational modeling; Data structures; Field programmable gate arrays; Real-time systems; Sensors; Time division multiplexing; Timing; Composability; Embedded systems; Preemptive hierarchical scheduling; Temporal partitioning; Time-triggered applications;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Embedded and Real-Time Computing Systems and Applications (RTCSA), 2013 IEEE 19th International Conference on
Conference_Location :
Taipei
ISSN :
1533-2306
Type :
conf
DOI :
10.1109/RTCSA.2013.6732218
Filename :
6732218
Link To Document :
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