• DocumentCode
    680071
  • Title

    FPGA-based reconfigurable unit for image filtering in frequency domain

  • Author

    Ledesma-Carrillo, Luis M. ; Lopez-Ramirez, Misael ; Martinez-Herrera, Ana L. ; Cabal-Yepez, Eduardo ; Garcia-Perez, A.

  • Author_Institution
    Div. de Ingenierias, Univ. de Guanajuato, Salamanca, Mexico
  • fYear
    2013
  • fDate
    9-11 Dec. 2013
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Digital filtering is a key step of image processing in many applications. Due to its importance in this work a general FPGA-based reconfigurable architecture for real-time, online image filtering in the frequency domain is presented. The proposed FPGA-based implementation is portable to distinct platforms from different vendors. Obtained results from different study cases show the high capability and performance of the proposed hardware implementation by applying any user designed filtering operation on an image, and outperforming by two orders of magnitude its software implementation counterpart.
  • Keywords
    field programmable gate arrays; filtering theory; image processing; reconfigurable architectures; FPGA-based reconfigurable unit; digital filtering; frequency domain; hardware implementation; image processing; online image filtering; 2D-FFT; FPGA; Frequency domain; Generic architecture; Image filtering; Real-time image processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on
  • Conference_Location
    Cancun
  • Print_ISBN
    978-1-4799-2078-5
  • Type

    conf

  • DOI
    10.1109/ReConFig.2013.6732294
  • Filename
    6732294