PASC: Physically authenticated stable-clocked soc platform on low-cost FPGAs

Generation of device-unique digital signatures using Physically Unclonable Functions (PUFs) is an active area of research for the last decade. However, most PUFs are conceived and designed as stand-alone hardware modules. In contrast, this paper proposes a PUF architecture that is tightly integrated into the core of a system-on-chip (SoC), with the purpose of creating a physical SoC authentication mechanism. The proposed PUF is integrated into the custom instruction interface of the NIOS-II processor. Therefore, PUF challenges can be issued by instruction calls which allows run-time authentication and which enables implementation of flexible post-processing mechanisms in software. The proposed PUF utilizes critical timing path violations of a custom instruction execution to generate digital signatures which are unique for individual chips due to random process variations. We implement PASC on a low-cost Altera DEO-Nano Development Board and we validate the quality of the authentication keys on 15 Boards.