FPGA based implementation of low-latency floating-point exponential function

Exponential function is an essential requisite in a wide range of engineering application, such as image processing and digital signal processing (DSP). This paper describes a FPGA implementation of double precision exponential function. The design module provides low latency and high accuracy. The low-latency floating-point exponential function simulation results show that the exponential function has a latency of 23 clock cycles and the average error of the proposed exponential function is 2.39e-16.