Real-time 3D graphics for mobile devices on reconfigurable hardware

Mobile devices are leading the second revolution in the computer graphics arena, especially with regard to 3D graphics. The mobile phone is the most widespread mobile devices with rendering capabilities. Those capabilities have been very limited because the resources on such devices are relatively scarce with respect to the PC; small amounts of memory, little bandwidth, little chip area dedicated for special purposes, and limited power consumption. In order to enhance domestic research strength in the mobile graphics chips and break foreign patent blockade, we presents a fixed 3D graphics rendering pipeline for both geometry and rendering operation in this paper. The research of the 3D graphics rendering pipeline has gone through a rigorous design process: starting from system modeling (using Verilog HDL), algorithm validation on simulation platform, RTL implementation, and hardware/software co-simulation on FPGA development board. The maximum performance of the pipeline is 8.33M Polygons/s and 100M Pixels/s at an operating frequency of 100 MHz.