• DocumentCode
    682521
  • Title

    Differential power analysis: Simulated versus experimental attacks

  • Author

    Pitu, Ciprian Leonard ; Campeanu, Radu

  • Author_Institution
    Corp. Technol., Siemens SRL, Braşov, Romania
  • fYear
    2013
  • fDate
    24-27 Oct. 2013
  • Firstpage
    177
  • Lastpage
    180
  • Abstract
    This paper presents differences and similarities between experimental and simulated differential power analysis (DPA) based security attacks. DPA attacks are known for many years and experimental attacks have been performed on a large number of hardware and/or software implementations of various cryptographic algorithms (RSA, AES, etc.). Vulnerabilities are mostly discovered after the product has been released to the market making it quasi impossible to fix them. Therefore, a new approach to detecting security vulnerabilities is needed; one that detects flaws early in the design process, before the circuit is manufactured. This method relies on digital simulations rather than on experimental measurements. Simulations are the foundation of functional verification of digital circuits. Using a specifically for this purpose developed software framework, called Power Analysis Toolkit, a comparison between simulated and experimental DPA attacks was performed. The attacked circuit is a hardware implementation of the well-known AES cryptographic algorithm. Results show that, using the correct assumptions, digital simulations can be used to uncover security vulnerabilities.
  • Keywords
    circuit simulation; cryptography; digital simulation; field programmable gate arrays; logic design; logic simulation; AES cryptographic algorithm; DPA based security attack; attacked circuit; cryptographic algorithms; design process; digital circuit; digital simulations; experimental attack; experimental differential power analysis; hardware implementation; power analysis toolkit; security vulnerability detection; simulated attack; simulated differential power analysis; Cryptography; Field programmable gate arrays; Hardware; Integrated circuit modeling; Logic gates; Power measurement; DPA; FPGA; Gate Level Simulation; Security Vulnerabilities;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design and Technology in Electronic Packaging (SIITME), 2013 IEEE 19th International Symposium for
  • Conference_Location
    Galati
  • Type

    conf

  • DOI
    10.1109/SIITME.2013.6743668
  • Filename
    6743668