A high performance continuous-time sigma-delta modulator with a 2 MHz bandwidth hybrid loop filter for wireless healthcare applications

A continuous-time (CT) sigma-delta (ΣΔ) modulator clocked at 128 MHz with a hybrid active-passive loop filter is presented for wireless and wearable technologies in healthcare systems. The proposed 5^th-order loop filter architecture mainly consists of two passive integrators, three active integrators, 2-bit flash analog-to-digital converter (ADC), and a current steering digital-to-analog converter (DAC). To erase the summation amplifier used in the chain of integrators with weighted feedforward summation (CIFF) topology, the capacitive feedforward structure is employed. In addition, local feedback resistors are designed to form the bridge-T network to reduce the chip area. The prototype chip is fabricated with TSMC 0.18 μm CMOS technology. Under the supply voltage of 1.8 V, measured results have achieved a dynamic range of 67 dB over a 2 MHz signal bandwidth, a SNDR of 63.3 dB, an ENOB of 10.2 bits, IM3 of 60 dB and a power dissipation of 9.52 mW including 8.1 mW of analog power. Including pads, the chip area is 0.8365 (1.195 × 0.7) mm².