DocumentCode
684123
Title
Void-free encapsulation technique for semiconductor devices using silicone gel
Author
Sato, Mitsuhisa ; Kumada, A. ; Hidaka, K. ; Yamashiro, K. ; Hayase, Y. ; Takano, Takeshi
Author_Institution
Dept. of Electr. Eng., Univ. of Tokyo, Tokyo, Japan
fYear
2013
fDate
20-23 Oct. 2013
Firstpage
921
Lastpage
924
Abstract
Silicone gel is widely used to encapsulate power electronic circuits. Voids in silicone gel have been pointed out as one of the weakest points in insulation where partial discharges (PDs) may easily occur. Degassing process is generally utilized to eliminate voids, but it depends largely on empirical know-how and it is not foolproof. In this paper, an effective encapsulation technique is discussed quantitatively. The theoretical analysis is also experimentally verified. The measured results were in good agreement with the theory. The proposed encapsulation technique reduced the amplitude and number of PDs.
Keywords
encapsulation; gels; insulated gate bipolar transistors; partial discharges; power electronics; semiconductor device packaging; silicones; PDs; degassing process; partial discharges; power electronic circuit encapsulation; semiconductor devices; silicone gel; void-free encapsulation technique; Encapsulation; Equations; Mathematical model; Metallization; Partial discharges; Power electronics; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Insulation and Dielectric Phenomena (CEIDP), 2013 IEEE Conference on
Conference_Location
Shenzhen
Type
conf
DOI
10.1109/CEIDP.2013.6748186
Filename
6748186
Link To Document