20-24bit ultra-high resolution parallel readout photon counting ASIC for hybrid X-ray detectors

This paper summarizes progress of development of LXT-RXP03BM0, an ultra-high resolution 20/24bit parallel readout photon counting ASIC for hybrid type X-ray imaging devices. Each pixel adopts a programmable 24bit Linear Feedback Shift Register (LFSR), and operates in alternating counting and readout modes. Each data bit is relayed to the corresponding LFSR of adjacent pixel in parallel, and the resolution can be adjusted to 20bit if faster data reading out is required. The chip core is comprised of a matrix arrayed single pixels, which are capable of detecting and discriminating incoming photoelectric signals from photo sensor. Periphery digital control blocks and a column addressing block are embedded within the IC to generate various necessary control signals, and data readout. A single pixel is equipped with a programmable CSA, a programmable 20/24bit LFSR, and data transfer logics. The image resolution can be controlled by setting each LFSR to either 20bit or 24bit depending on applications. The CSA can operate at two different gain modes: typical gain and high gain, to widen the input dynamic range of the ASIC. Degree of amplification is determined by the ratio of embedded feedback components such as capacitors and resisters that are controlled by switches in accordance with an external digital gain selection signal. Data processing is done in digital, for discrete data reading out. The data acquired from a pixel counter is transferred to a next corresponding counter, pixel-to-pixel, bit-to-bit basis. The data come out in 20 or 24bit parallel. The LXT-RXP03BM0 is a prototype chip, designed and manufactured in a 6-metal 0.18μm CMOS technology. The chip is being tested, and a revision chip will be out in near future.