Title :
Development of an ASIC for charged particle counting with silicon radiation detectors
Author :
Meier, Daniel ; Azman, Suleyman ; Ramstad, Jan Erik ; Hasanbegovic, A. ; Talebi, Jahanzad ; Altan, Mehmet Akif ; Berge, H.K.O. ; Pahlsson, Philip ; Gheorghe, Codin ; Johansen, Tor Magnus ; Maehlum, Gunnar
Author_Institution :
Integrated Detector Electron. AS, Norway
fDate :
Oct. 27 2013-Nov. 2 2013
Abstract :
The IDE 3465 is an application specific integrated circuit (ASIC) that has been designed for the readout of silicon detectors for charged particles. The chip has 20 inputs of charge sensitive pre-amplifiers (CSA), a total of 37 digital logic trigger outputs, and one analogue multiplexer output for pulse heights. Out of the 20 channels, 16 have a high gain with saturation at 2.6 pC, and 4 have a low gain with saturation at 26 pC. The chip is optimized for positive input charges, i.e., it is suitable for the readout and triggering of the charge from the p-side of silicon sensors. In the high-gain channels, the charge sensitive pre-amplifier is connected to one slow shaper of 1-μs shaping time and two fast shapers of 250-ns shaping time, while the low-gain channels have only one slow shaper and one fast shaper of 1-μs and 250-ns shaping time. Each fast shaper output is connected to a comparator, which triggers when the pulse shape exceeds the reference level that can be programmed by 8-bit DACs. The two fast shapers and comparators of the high-gain channels are used for charges in the range from 1 fC to 100 fC and from 100 fC to 2.6 pC, respectively. The fast shapers and comparators of the low-gain channels are designed for charges in the range from 1 pC to 26 pC. Each comparator feeds a mono-stable output, which can be connected directly to an FPGA. The chip requires negative and positive voltage supplies (-2 V, +1.5 V and +3.3 V) and one reference bias current to generate its internal biases. The total power consumption is less than 65 mW, depending on the input event rate and options enabled. The chip has a 356-bit register, programmable via serial interface, which allows one to set various functions, to program digital-to-analogue converters (DACs), and to tune parameters. All amplifier inputs are protected by diodes against over-voltage and electro-static discharge (ESD). The chip is SEU/SEL radiation hardened by design and manufacture.
Keywords :
application specific integrated circuits; digital-analogue conversion; electrostatic discharge; pulse shaping; radiation hardening (electronics); readout electronics; silicon radiation detectors; ASIC; CSA; DAC; ESD; FPGA; IDE 3465; SEU-SEL radiation hardnessz; analogue multiplexer output; application specific integrated circuits; charge sensitive preamplifiers; charged particle counting; digital logic trigger outputs; digital-to-analogue converters; electrostatic discharge; high-gain channels; monostable output; positive voltage supplies; pulse heights; pulse shape; readout; reference level; serial interface; silicon radiation detectors; silicon sensors; Aerospace electronics; Application specific integrated circuits; Noise; Semiconductor device measurement; Sensors; Silicon; Temperature measurement;
Conference_Titel :
Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC), 2013 IEEE
Conference_Location :
Seoul
Print_ISBN :
978-1-4799-0533-1
DOI :
10.1109/NSSMIC.2013.6829764