Towards High-Speed Real-Time HTTP Traffic Analysis on the Tilera Many-Core Platform

The ever-growing big-data applications have brought forth increasingly demands in understanding the traffic nature on high speed links on the Internet. Traditional traffic collection and protocol analysis systems were usually designed and implemented on the X86 computer systems, subject to the CPU capability, I/O speed constraints and other factors. In this paper, we proposed a parallel implementation of high-speed real- time HTTP traffic analyzer on the Tilera manycore processors. This system consists of 4 major components: traffic capturing, IP defragmentation, TCP stream reassembly and HTTP web page recovery. To improve the traffic analysis capability of this system, we decompose the traditional HTTP traffic analysis tasks into parallel threads, which can run on Tilera TILEPro64 processors simultaneously. Then, we proposed a scheduling model for allocating the computing capability of TILEPro64 processors efficiently given a set of inequality constraints in order to fully utilize the TILEPro64´s cores for high-speed HTTP traffic analysis. We constructed a testbed to evaluate the performance of the proposed TILEPro64-based system. The experiment results show that the system can correctly analyze real-time HTTP traffic up to 2Gbps.