Thermal aware power gated design

High packing density increases the power consumption and consequently may increase the power density of the VLSI circuit. As heat generation is proportional to the power density, chip temperature increases with the increase of the power density. Again as area increases, power density decreases i.e, power density will be least when area will be maximum and power will be minimum. So, there is a trade off between area and power density. In this paper genetic algorithm based approach has been adopted to optimize both the area and power density of the circuit. Sometimes, power optimized circuit may have large area. So, there is trade off among area, power and power density also. Optimization of these three parameters has also been considered in this paper.