Title :
A CMOS low-voltage reference based on body effect and switched-capacitor technique
Author :
Yudong Lin ; Hao Zhang ; Yoshihara, Tatsuhiko
Author_Institution :
Grad. Sch. of Inf., Production & Syst., Waseda Univ., Kitakyushu, Japan
Abstract :
A low power CMOS voltage reference using body effect and switched-capacitor technique is presented in this paper. The output voltage is produced by the gate-source voltage. The MOSFETs are working on subthreshold region thus the power consumption is greatly reduced. By utilizing the switched-capacitor technique, only one transistor is required to generate the reference voltage, so that the threshold voltage mismatch in conventional two-transistor configuration is eliminated. The proposed circuit is designed and simulated under 0.18-μm CMOS technology. The output voltage is 117.68 mV, and the temperature coefficient is less than 50.0 ppm/°C ranging from -40 °C to 80 °C. The voltage line-sensitivity is 0.19 %/V ranging from 1.2 V to 3.2 V. The average current consumption is about 95 nA.
Keywords :
CMOS integrated circuits; MOSFET; low-power electronics; power consumption; reference circuits; switched capacitor networks; transistor circuits; CMOS low-voltage reference; CMOS technology; MOSFET; body effect; current 95 nA; current consumption; gate-source voltage; low power CMOS voltage reference; power consumption; reference voltage; size 0.18 mum; subthreshold region; switched-capacitor technique; temperature -40 degC to 80 degC; temperature coefficient; threshold voltage mismatch; two-transistor configuration; voltage 1.2 V to 3.2 V; voltage 117.68 mV; voltage line-sensitivity; CMOS integrated circuits; Capacitors; Logic gates; MOSFET; Resistors; Switching circuits; Threshold voltage; CMOS; Low-voltage; body effect; sub-threshold; switched-capacitor technique; voltage reference;
Conference_Titel :
SoC Design Conference (ISOCC), 2013 International
Conference_Location :
Busan
DOI :
10.1109/ISOCC.2013.6863994
