Title :
Low-power area-efficient high-voltage linear amplifier for driving integrated 2-D ultrasound transducer array
Author :
Song-Hyun Gu ; Sung-Jin Jung ; Seong-Kwan Hong ; Oh-Kyong Kwon
Author_Institution :
Dept. of Electron. Eng., Hanyang Univ., Seoul, South Korea
Abstract :
In this paper, a low-power area-efficient high-voltage (HV) linear amplifier using a current feedback (CFB) topology is proposed for driving integrated 2-D ultrasound transducer array. The CFB topology reduces power consumption of the HV linear amplifier by fixing bandwidth independent of voltage gain. Also, integration of the circuit underneath an ultrasound transducer saves the area by reducing the number of buffering laterally double-diffused MOSFETs (LDMOSFETs) driving capacitive load of the connection cable between front-end circuit and the ultrasound transducer array. Simulation results are obtained by using HSPICE in a 0.18 μm CMOS process with 50 V LDMOSFET devices. The voltage gain is 42.9 dB at 3 dB cut-off frequency of 6.2 MHz. The total static power consumption and the chip area are 5.6 mW and 0.017 mm2, respectively. This results show that the circuit is suitable for driving integrated 2-D ultrasound transducer array.
Keywords :
CMOS integrated circuits; MOSFET; feedback amplifiers; low-power electronics; ultrasonic transducer arrays; CFB topology; CMOS process; HSPICE; LDMOSFET; capacitive load; connection cable; current feedback topology; frequency 6.2 MHz; front-end circuit; gain 42.9 dB; integrated 2D ultrasound transducer array; laterally double-diffused MOSFET; low-power area-efficient high-voltage linear amplifier; power 5.6 mW; size 0.18 mum; static power consumption; voltage 50 V; voltage gain; Arrays; Bandwidth; Power demand; Topology; Transconductance; Transducers; Ultrasonic imaging; current feedback; high-voltage linear amplifier; ultrasound;
Conference_Titel :
SoC Design Conference (ISOCC), 2013 International
Conference_Location :
Busan
DOI :
10.1109/ISOCC.2013.6863999