Title :
A 5-Gb/s 11.4mW half-rate CDR in 0.18μm CMOS
Author :
Taek-Joon An ; Jin-Ku Kang
Author_Institution :
Dept. of Electron. Eng., Inha Univ., Incheon, South Korea
Abstract :
A low-power clock and data recovery(CDR) circuit with a phase detector(PD) using dynamic current-mode logic latches and a novel V/I converter is described. The proposed latch draws a current during half of the clock cycle and the proposed V/I converter includes the XOR function by itself. The half-rate CDR circuit is simulated using 5-Gb/s with 0.18-um CMOS technology, and the circuit consumes only 11.4mW from a 1.8-V supply.
Keywords :
CMOS logic circuits; clock and data recovery circuits; current-mode logic; flip-flops; phase detectors; CMOS integrated circuit; V/I converter; XOR function; bit rate 5 Gbit/s; dynamic current mode logic latch; half rate CDR; low power clock and data recovery circuit; phase detector; power 11.4 mW; size 0.18 mum; voltage 1.8 V; CMOS integrated circuits; CMOS technology; Clocks; Latches; Logic gates; Power demand; Voltage-controlled oscillators; Clock and Data Recovery(CDR); half-rate linear phase detector(PD);
Conference_Titel :
SoC Design Conference (ISOCC), 2013 International
Conference_Location :
Busan
DOI :
10.1109/ISOCC.2013.6864042
