DocumentCode
692606
Title
Reduced memory IFFT design for OFDM systems using DIT twiddle factor shifting algorithm
Author
Ho-Yun Lee ; Jun-Ho Kim ; Jin-Gyun Chung
Author_Institution
Div. of Electron. Eng., Chonbuk Nat. Univ., Jeonju, South Korea
fYear
2013
fDate
17-19 Nov. 2013
Firstpage
374
Lastpage
375
Abstract
In this paper, to reduce the memory size of IFFT for OFDM systems, we propose a new IFFT design based on a mapping of three IFFT input signals: modulated data, pilot and null signals. To reduce the memory cells, the proposed method focuses on reducing the size of memory cells in the bit-reversal part which requires the largest number of memory cells in IFFT. To this end, we propose a DIT(decimation-in-time) twiddle factor shifting algorithm to remove the multipliers in the first two stages. It is shown that the proposed method achieves a memory reduction of about 30% compared with conventional methods.
Keywords
OFDM modulation; digital storage; fast Fourier transforms; DIT twiddle factor shifting algorithm; IFFT input signal mapping; OFDM systems; bit-reversal part; decimation-in-time twiddle factor shifting algorithm; memory cell size reduction; modulated data; null signal; pilot signal; reduced memory IFFT design; Algorithm design and analysis; Design methodology; Memory management; Modulation; OFDM; Signal processing algorithms; DIT; IFFT; SDF; mapping; memory reduction;
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference (ISOCC), 2013 International
Conference_Location
Busan
Type
conf
DOI
10.1109/ISOCC.2013.6864055
Filename
6864055
Link To Document