• DocumentCode
    693280
  • Title

    Pipelined Gray encoding scheme for ultra-high sampling rate Flash ADCs

  • Author

    Mingzhen Wang ; Ling Wang ; Hongsheng Zhong

  • Author_Institution
    Sch. of Electron. Eng., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
  • fYear
    2013
  • fDate
    26-28 Oct. 2013
  • Firstpage
    71
  • Lastpage
    74
  • Abstract
    This paper analyzes and verifies Gray encoding schemes with a proposed pipelined Gray encoding scheme for ultra-high sampling rate Flash ADCs. The Gray encoding scheme significantly suppresses the sparkles and meta-stability errors of parallelized comparators of ultra-high sampling rate Flash ADCs. 4-b Flash ADCs are implemented with different encoding schemes in the 0.13μm CMOS digital process. The results show that using the proposed pipelined Gray encoding scheme, the 4-b ADC achieves 5dB more in SNR at 4GSPS. This is about 20% improvement of SNR from using thermometer-to-1-of-n-to-binary encoding scheme.
  • Keywords
    CMOS digital integrated circuits; Gray codes; analogue-digital conversion; binary codes; pipeline arithmetic; 4GSPS; CMOS digital process; SNR; binary encoding scheme; metastability errors; parallelized comparators; pipelined Gray encoding scheme; size 0.13 mum; ultra-high sampling rate flash ADC; CMOS integrated circuits; Encoding; Error correction; Logic gates; Reflective binary codes; Signal to noise ratio;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computational Problem-solving (ICCP), 2013 International Conference on
  • Conference_Location
    Jiuzhai
  • Type

    conf

  • DOI
    10.1109/ICCPS.2013.6893528
  • Filename
    6893528