Parallel binary search trees for rapid IP lookup using graphic processors

With increasing size of BGP table, speed of physical links and size of routing table, there has been growing demand in achieving rapid IP lookup cost-effectively. Although approaches like parallelism using specialized hardwares such as TCAM exist but they are not so cost effective. This paper investigates a new approach in building a cost-effective IP lookup scheme using parallel binary search tree over graphics processing unit. Our contribution here is to design a practical algorithm for rapid IP look up while lessening the possibilities of insertion, deletion or any other modification operations over router. We have also considered only 99% of the total used IP prefixes which are most used. Leveraging GPU´s multicore parallelism, the proposed algorithm parallelizes binary search trees for parallel and independent search IP prefixes lookup. Our simulation results show a promising gain in IP lookup operation.