• DocumentCode
    693522
  • Title

    Demo abstract: Distributed debugging architecture for wireless sensor networks

  • Author

    Sommer, P. ; Kusy, Branislav

  • Author_Institution
    ICT Centre, Autonomous Syst. Lab., CSIRO, Brisbane, QLD, Australia
  • fYear
    2013
  • fDate
    8-11 April 2013
  • Firstpage
    311
  • Lastpage
    312
  • Abstract
    Limited visibility into the global network state renders testing and debugging sensor network applications a challenging task. Existing debugging methods are often non-intrusive and require modifications of the binary image. Hardware based debugging instrumentation such as JTAG has not been widely used beyond a single node, mainly due to its relatively high cost and lack of software support for distributed debugging. This demonstration presents a novel architecture for distributed debugging of wireless sensor networks using a low-cost extension board to access the on-chip debug module of the node´s processor. Connecting several of those debug boards using a backbone network provides distributed control and monitoring of the sensor network in test.
  • Keywords
    wireless sensor networks; distributed debugging architecture; low-cost extension board; node processor; on-chip debug module; wireless sensor networks; Computer architecture; Debugging; Monitoring; Observers; Ports (Computers); Universal Serial Bus; Wireless sensor networks; Debugging; JTAG; Tracing; Wireless Sensor Network;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Processing in Sensor Networks (IPSN), 2013 ACM/IEEE International Conference on
  • Conference_Location
    Philadelphia, PA
  • Type

    conf

  • DOI
    10.1109/IPSN.2013.6917559
  • Filename
    6917559