NeuroMatrix® NM6403 DSP with Vector/Matrix engine

The paper describes the architecture of the NeuroMatrix® NM6403 DSP designed for image processing, signal processing and neural networks emulation [1,2]. The paper includes a brief description of the processor structure and its instruction set. The NM6403 is the first DSP based on NeuroMatrix® Core (NMC) comprises an original 32-bit VLIW RISC processor and a 64-bit SIMD Vector co-processor (VCP). In contrast to other modern general purpose DSPs and microprocessors with SIMD units such as: Texas Instruments c64xx, Intel Pentium MMX, Motorola AltiVec PowerPC G4 and Analog Devices TigerSHARC, the new DSP performs variable bit-length vector/matrix arithmetic, logic and saturation operations. The main NMC operation is matrix by vector multiplication. The NM6403 supports shared memory mode for two 64-bit external data buses. Two byte-width communication ports simplify the multiprocessor systems design. The NM6403 has been designed by RC "Module" (www.module.ru) and produced by Samsung 0.5μm CMOS technology. The peak performance - up to 14.400 MMACs (million multiplication and accumulations per second) has been achieved at a 50MHz clock rate, 3.3V operating voltage and PBGA256 package.