Design of digital filters with low power consumption

In this paper we discuss different methods to design digital filters with low power consumption. One efficient method is based on power supply voltage scaling where the excess speed that may be obtained using maximally fast recursive filter structures or non-recursive structures are exploited. We also discuss several techniques to increase and obtain the maximal sample rate for recursive structures based on frequency masking techniques and wave digital filters. The implementation approach is applicable to bit-parallel, digit-serial, and bit-serial arithmetic in standard CMOS processes.