DocumentCode
697883
Title
Analysis of a parallel lexical-tree-based speech decoder for multi-core processors
Author
Parihar, Naveen ; Hansen, Eric A.
Author_Institution
Dept. of Electr. & Comput. Eng., Mississippi State Univ., Starkville, MS, USA
fYear
2009
fDate
24-28 Aug. 2009
Firstpage
2509
Lastpage
2513
Abstract
We present a systematic analysis of a lexical-tree based parallel search algorithm for multi-core desktop processors. We introduce an analytical model that predicts the speedup from parallelization after accounting for load imbalance among the cores. Various sources of overhead in the parallel search algorithm are described, benchmarked and analyzed. Besides load imbalance, these include the inherently serial steps of the parallel search algorithm and an increase in main memory access latency.
Keywords
multiprocessing systems; speech codecs; speech coding; trees (mathematics); main memory access latency; multicore desktop processors; parallel lexical-tree; parallel search algorithm; speech decoder; Analytical models; Computational modeling; Decoding; Load modeling; Pipelines; Prediction algorithms; Runtime;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Conference, 2009 17th European
Conference_Location
Glasgow
Print_ISBN
978-161-7388-76-7
Type
conf
Filename
7077455
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