Title :
Novel systolic schemes for serial-parallel multiplication
Author :
Sideris, I. ; Anagnostopoulos, K. ; Kalivas, P. ; Pekmestzi, K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Nat. Tech. Univ. of Athens, Athens, Greece
Abstract :
In this paper two new schemes of systolic multipliers are proposed, one based on Modified Booth encoding and the other is based on the selection of one of the terms 0, X, 2X, 3X where x is the serial input of the multiplier. The proposed multipliers operate with 100% efficiency that is without zero words inserted between successive data. Systolisity and the continuous operation are achieved without an increase in hardware complexity. The proposed schemes are especially suited for long number multiplication.
Keywords :
multiplying circuits; systolic arrays; continuous operation; hardware complexity; long number multiplication; modified booth encoding; serial-parallel multiplication; systolic multipliers; Complexity theory; Computer architecture; Delays; Encoding; Hardware; Microprocessors; Throughput;
Conference_Titel :
Signal Processing Conference, 2005 13th European
Conference_Location :
Antalya
Print_ISBN :
978-160-4238-21-1
