Memory aspects in signal processing and HLS tool: Some results

The digital signal processing system design consists in four synthesis phases which concern the processing, the control, the memory and the communication units. Today, many tools enables us to produce the processing unit. However, in many applications, the hardware solution may be challenged by the number and complexity of memories. This paper proposes a design methodology of the memory units for algorithms restricted by a real time constraint. The original nature of our approach, is due to the fact that it proposes a global memory solution for a transfer sequence computed by the synthesis tools, like GAUT.