FPGA implementation of multiprocessor core Architecture for Embedded Concurrent Computing

The Embedded multiprocessor core is a design philosophy that has become a mainstream in Scientific and engineering applications. The FPGA permit complex logic systems implemented on single programmable devices. The Embedded multiprocessors face a new problem with thread safety. It is caused by the shared memory, when thread safety is violated the processors can access the same value at the same time. Therefore, design a new Architecture called Embedded Concurrent Computing. This is implemented on the FPGA using VHDL. The Embedded Concurrent Computing architecture performs a simultaneous use of both parallel and distributed computing. The proposed embedded multiprocessor core contains Homogeneous Embedded RISC processors, added with pipe lined processing units, Multibus organization and I/o ports along with the other functional elements required to implement embedded SOC solutions. The multiprocessor core performance issues like area, speed and power dissipation and propagation delay are analyzed at 90nm process technology using Xilinx tool.