• DocumentCode
    702893
  • Title

    LMS algorithm implementation in FPGA for noise reduction and echo cancellation

  • Author

    Niras C V ; Yinan Kong

  • Author_Institution
    Department of Electronics and Communication Engineering, Govt. Model Engineering College, Thrikkakara, Kochi 682 021, India
  • fYear
    2012
  • fDate
    19-20 Oct. 2012
  • Firstpage
    193
  • Lastpage
    195
  • Abstract
    An FPGA implementation of a delayed Least Mean Square (LMS) adaptive filter is proposed for acoustic noise reduction and echo cancellation. The design is based on a single MAC FIR filter minimizing the utilization of FPGA resources. This structure is well suited for echo cancellation and noise reduction in concert halls, where the filter length is high and the sampling rate is relatively low.
  • Keywords
    Echo canceller; FPGA; LMS; adaptive systems; noise reduction;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Communication and Computing (ARTCom2012), Fourth International Conference on Advances in Recent Technologies in
  • Conference_Location
    Bangalore, India
  • Type

    conf

  • DOI
    10.1049/cp.2012.2525
  • Filename
    7087814
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=702893