DocumentCode :
70312
Title :
Subquadratic Space-Complexity Digit-Serial Multipliers Over GF(2^{m}) Using Generalized (a,b)
Author :
Chiou-Yng Lee ; Meher, Pramod Kumar
Author_Institution :
Comput. Inf. & Network Eng., Lunghwa Univ. of Sci. & Technol., Taoyuan, Taiwan
Volume :
62
Issue :
4
fYear :
2015
fDate :
Apr-15
Firstpage :
1091
Lastpage :
1098
Abstract :
Karatsuba algorithm (KA) is popularly used for high-precision multiplication by divide-and-conquer approach. Recently, subquadratic digit-serial multiplier based on (a,2)-way KA decomposition is proposed in [1]. In this paper, we extend a (a,2)-way KA to derive a generalized (a,b)-way KA decomposition with a ≠ b. We have shown that (a,2)-way KA and mult-way KA are special cases of the proposed (a,b)-way KA decomposition. Based on the proposed KA decomposition, we have established two types of subquadratic digit-serial multipliers, namely, the KA-based multiplier and the recombined KA-based multiplier. From theoretical analysis, as well as, from synthesis results we have shown that the proposed KA-based multipliers have significantly less delay and less area-delay product (ADP) compared to the existing naive digit-serial multipliers.
Keywords :
Galois fields; computational complexity; divide and conquer methods; multiplying circuits; (a,b)-way KA decomposition; GF(2m); area-delay product; divide-and-conquer approach; generalized (a,b)-way Karatsuba algorithm; high-precision multiplication; recombined KA-based multiplier; subquadratic digit-serial multipliers; subquadratic space-complexity; Complexity theory; Computer architecture; Cryptography; Delays; Logic gates; Polynomials; Pulse width modulation; Digit-serial multiplication; Karatsuba algorithm; elliptic curve cryptography; subquadratic space complexity multiplication;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2015.2388842
Filename :
7044608
Link To Document :
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