DocumentCode
703210
Title
DSP architecture for real time digital video converter
Author
Franchina, Luisa
Author_Institution
Dept. of Electron. Eng., La Sapienza Univ., Rome, Italy
fYear
1998
fDate
8-11 Sept. 1998
Firstpage
1
Lastpage
4
Abstract
In this paper we propose the architecture of a digital video standard converter based on the use of DSP processors (AD 21060 SHARC) completely programmable and able to perform real time elaboration. The purpose is to verify experimentally the possibility to implement very complex motion compensation algorithm (for example in real time digital television standard converter), on a multiprocessing DSP system. In this way is possible to make very versatile digital elaborators (because programmable) and at low cost. This system find out applications in: - Digital Video Broadcasting (DVB) [1-2, 4-6] - Artificial intelligence - Robotics and military applications in motion detection system.
Keywords
artificial intelligence; digital signal processing chips; digital video broadcasting; motion compensation; multiprocessing systems; real-time systems; robots; AD 21060 SHARC; DSP architecture; DSP processors; DVB; artificial intelligence; digital elaborators; digital video broadcasting; digital video standard converter; military applications; motion detection; multiprocessing DSP system; real time digital television standard converter; real time digital video converter; real time elaboration; robotics applications; very complex motio compensation; Digital signal processing; Finite impulse response filters; Interpolation; Motion compensation; Program processors; Real-time systems; Standards;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Conference (EUSIPCO 1998), 9th European
Conference_Location
Rhodes
Print_ISBN
978-960-7620-06-4
Type
conf
Filename
7089681
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