DocumentCode
703467
Title
Low power detection
Author
Nafie, Mohammed ; Tewfik, Ahmed
Author_Institution
Dept. of Electr. Eng., Univ. of Minnesota, Minneapolis, MN, USA
fYear
1998
fDate
8-11 Sept. 1998
Firstpage
1
Lastpage
4
Abstract
Low power and low complexity algorithms for signal processing applications have gained increasing importance with the deployment of portable communication equipment. Most of the current power reduction techniques rely on reducing the power by VLSI implementation. This approach is expensive and limited by technology. Hence algorithm design optimization is a must for low energy consumption. Here, we propose using finite memory detection algorithms as low complexity-low energy near optimal detection algorithm that trades a small amount of detection performance for a reduction in complexity and power consumption. The negligible loss in detection performance is easily accommodated in wireless video and audio transmission applications. In data applications, this small loss can be further reduced with error correcting codes at the expense of a slight loss in communication bandwidth. We present simple algorithms for deriving the near optimum finite memory detectors in the time invariant and time variant case. The same algorithms can be used in tandem configurations in decenteralized detection.
Keywords
VLSI; error correction codes; power consumption; signal detection; VLSI implementation; decenteralized detection; energy consumption; error correcting codes; finite memory detection; low power detection; optimal detection; portable communication equipment; power reduction; signal processing; time invariant case; wireless audio transmission; wireless video transmission; Complexity theory; Detectors; Mathematical model; Optimization; Quantization (signal); Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Conference (EUSIPCO 1998), 9th European
Conference_Location
Rhodes
Print_ISBN
978-960-7620-06-4
Type
conf
Filename
7089938
Link To Document