Open transistor fault detection in asymmetric multilevel inverter

The number of power semiconductor switches and DC sources will increase with the increase in the number of levels of output voltage of the multilevel inverter. As the number of power semiconductor switches increases, the possibility of its failure and hence the breakdown of the inverter operation also escalate in a nonlinear manner. Hence, the detection of the failure of the power semiconductor switch is of paramount importance, considering the availability and reliability of the system is concerned. The gate unavailability or the transistor open circuit fault detection in asymmetrical multilevel inverter by means of monitoring the mean value of the output voltage is presented in this paper. Simulation of this method is carried out in both binary and trinary combinations of asymmetric multilevel inverter.