DocumentCode
703815
Title
Detection of illegitimate access to JTAG via statistical learning in chip
Author
Xuanle Ren ; Grade Tavares, Vitor ; Blanton, R.D.
Author_Institution
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear
2015
fDate
9-13 March 2015
Firstpage
109
Lastpage
114
Abstract
IEEE 1149.1, commonly known as the joint test action group (JTAG), is the standard for the test access port and the boundary-scan architecture. The JTAG is primarily utilized at the time of the integrated circuit (IC) manufacture but also in the field, giving access to internal sub-systems of the IC, or for failure analysis and debugging. Because the JTAG needs to be left intact and operational for use, it inevitably provides a “backdoor” that can be exploited to undermine the security of the chip. Potential attackers can then use the JTAG to dump critical data or reverse engineer IP cores, for example. Since an attacker will use the JTAG differently from a legitimate user, it is possible to detect the difference using machine-learning algorithms. A JTAG protection scheme, SLIC-J, is proposed to monitor user behavior and detect illegitimate accesses to the JTAG. Specifically, JTAG access is characterized using a set of specifically-defined features, and then an on-chip classifier is used to predict whether the user is legitimate or not. To validate the effectiveness of the approach, both legitimate and illegitimate JTAG accesses are simulated using the OpenSPARC T2 benchmark. The results show that the detection accuracy is 99.2%, and the escape rate is 0.8%.
Keywords
IEEE standards; circuit analysis computing; integrated circuit testing; learning (artificial intelligence); pattern classification; security; IEEE 1149.1; JTAG protection scheme; OpenSPARC T2 benchmark; SLIC-J; illegitimate access detection; joint test action group; on-chip classifier; statistical learning; Accuracy; Debugging; Decision trees; Feature extraction; System-on-chip; Table lookup; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015
Conference_Location
Grenoble
Print_ISBN
978-3-9815-3704-8
Type
conf
Filename
7092367
Link To Document