DocumentCode
704058
Title
Automated rectification methodologies to functional state-space unreachability
Author
Berryhill, Ryan ; Veneris, Andreas
Author_Institution
ECE Dept., Univ. of Toronto, Toronto, ON, Canada
fYear
2015
fDate
9-13 March 2015
Firstpage
1401
Lastpage
1406
Abstract
In the modern design cycle, significant manual resources are dedicated to fix a design when verification shows that a state is not reachable. Today there is little automation to aid an engineer in understanding why a state is not reachable and how to correct it. This paper presents a novel methodology that automates this task. In detail, a process that involves intertwined steps of state approximation, reachability analysis and traditional debugging is developed to identify design locations where fixes can be applied so the target state becomes reachable. An initial formulation identifies such error locations that, when corrected, can make the target state reachable directly from the existing reachable set of states. This is later extended for the cases where more than one state transition is required to reach an unreachable state from the existing reachable set. Empirical results on industrial level designs show a performance which is an order of magnitude faster than the state-of-the-art confirming the practicality of the proposed automated methodology.
Keywords
computability; electronic design automation; reachability analysis; state-space methods; SAT-based automated debugging; automated rectification methodologies; functional state-space unreachability; reachability analysis; reachable set; state approximation; state transition; Accuracy; Algorithm design and analysis; Approximation algorithms; Approximation methods; Debugging; Reachability analysis; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015
Conference_Location
Grenoble
Print_ISBN
978-3-9815-3704-8
Type
conf
Filename
7092610
Link To Document